TESTLABEL	STATUS	AC_Settling(LOAD)	Max_VLOAD	Min_VLOAD	min_gain_margin	min_phase_margin	
LL_Nominal|F_Low|Disabled|100% Load|FindACSteadyState	PASS	PASS:  Voltage across LOAD has settled to (34.6802n) % and is less than or equal to Max Settling Spec of (10m) %	PASS: Max. Output1 Voltage (402.419) is less than or equal to Max. Output1 Voltage Spec (420)				
LL_Nominal|F_Low|Disabled|100% Load|BodePlot	PASS		PASS: Max. Output1 Voltage (402.42) is less than or equal to Max. Output1 Voltage Spec (420)	PASS: Min. Output1 Voltage (397.79) is greater than or equal to Min. Output1 Voltage Spec (380)	PASS: Gain Margin (28.9911) is greater than Min. Gain Margin (12)	PASS: Phase Margin (58.8663) is greater than Min. Phase Margin (35)	
LL_Nominal|F_Low|Disabled|80% Load|FindACSteadyState	PASS	PASS:  Voltage across LOAD has settled to (7.68184n) % and is less than or equal to Max Settling Spec of (10m) %	PASS: Max. Output1 Voltage (401.965) is less than or equal to Max. Output1 Voltage Spec (420)				
LL_Nominal|F_Low|Disabled|80% Load|BodePlot	PASS		PASS: Max. Output1 Voltage (401.966) is less than or equal to Max. Output1 Voltage Spec (420)	PASS: Min. Output1 Voltage (398.243) is greater than or equal to Min. Output1 Voltage Spec (380)	PASS: Gain Margin (29.3843) is greater than Min. Gain Margin (12)	PASS: Phase Margin (57.75) is greater than Min. Phase Margin (35)	
